The advent of 4^th industrial revolution has led to breakthroughs in these high-tech products which are now capable of performing various intelligent tasks such as real-time big data analysis, self-driving automobile navigation, speech/face recognition. These tasks usually deal with a large amount of unstructured data using software-based artificial neural network (ANN). But, these software-based ANNs tend to be energy efficient when used in versatile cognitive systems, making it very challenging to apply it to battery-powered mobile electronics with limited battery capacity. The high power consumption of conventional computing hardware for performing software-based ANN is mainly due to the von Neumann architecture which is energy-efficient for data-intensive tasks. To overcome this issue, it is necessary to develop novel semiconductor device enabling energy-efficient computing architecture.

I developed brain-inspired nanoelectronic synaptic devices that can energy-efficiently process ANN like a human. I demonstrated that the poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane)(pV3D3)-based memristor and 3D fin-shapded field-effect transistor, also known as FinFET, with a poly-Si/SiO₂/Si₃N₄ gate stack on a single-crystalline silicon channel (SONS) devices can be operated as an electronic synapse device featuring analog conductance update. The pattern recognition for human face and MNIST handwritten digit is evaluated via device-to-system level simulation using the ANN based on pV3D3 memristor and SONS devices, showing the superior online learning accuracy of ~91%.

Furthermore, I developed a 1selector-1memristor (1S-1M) integrated circuit using a pV3D3-memristor and a-In-Zn-Sn-O(a-IZTO)-selector to propose a conceptual strategy for realizing an energy-efficient memristive nonvolatile logic-in-memory circuit. This nonvolatile logic-in-memory circuit enables construction of a novel nonvolatile computing architecture in which memristor device can act as both a nonvolatile memory and logic gate. This circuit enables not only novel energy-efficient computing architecture via data-transfer elimintation, but also normally off computing with a static power consumption of 0 W. In addition, single-instruction multiple-data (SIMD) operation, the foundation of parallel computing is successfully implemented by performing NOT and NOR gates. The results presented here will pave the way for development of energy-efficient, intelligent electronic system.